Onsite
K-Tech ESDM Student Skilling Program
VERIFIED Source
Open for Applications
Semiconductor & Embedded VLSI Trainee
Monthly Stipend
₹16,000 / Month
Fixed Compensation
Duration
6 Months
Full-time / Flexible
Application Deadline
18 Dec 2026
Strict Cut-off Date
Academic Value
PPO + Credits
Official Certificate Provided
Role Overview & Objectives
Undergo hands-on digital ASIC flow synthesis, timing verification, and FPGA prototyping in state-backed Centre of Excellence.
Key Responsibilities & Deliverables
Design synthesizable IP blocks, write automated regression testbenches, and perform static timing analysis.
Eligibility Criteria
Eligible Degrees
B.Tech (ECE, EEE, VLSI Design), M.Tech
Academic Level
Undergraduate Student
Eligible Streams
Relevant Discipline
Minimum Percentage / CGPA
Institutional Passing Criteria
Detailed Specification: 3rd or final year engineering students with strong semiconductor device fundamentals.
Required Skills & Selection Stages
Required Skills & Tools
Verilog
SystemVerilog
FPGA
RTL Design
Synopsys Tools
Cadence EDA
Selection Workflow
Merit Profile Screening & Technical Discussion
Final selection is subject to document verification and supervisor confirmation.
Career Bridges in MPath
This internship directly reinforces competencies required for the following high-demand careers in India:
Official Application Channel
Openings:
20 Positions
Deadline:
18 Dec 2026
Application Fee:
₹0 (Free / Prohibited)
Statutory Caution: Official government schemes and leading corporations never demand payment or registration fees for internship applications.
Source Provenance
Source: Official Portal Ingestion
Verification: VERIFIED
Last Verified: 06 Oct 2026
About the Provider
Karnataka Innovation and Technology Society (K-Tech)
Government • Semiconductors & Electronics
Official Website